Browse Prior Art Database

Implementation of Reserve Storage for Bit/Word Hard Failures in Main Memory Without Software Support

IP.com Disclosure Number: IPCOM000046982D
Original Publication Date: 1983-Sep-01
Included in the Prior Art Database: 2005-Feb-07

Publishing Venue

IBM

Related People

Authors:
Ames, RN Jones, JF Martinez, PL Thatcher, LE [+details]

Abstract

Bit/word hard failures in main memory can be corrected without replacing the Field Replaceable Unit (FRU) and can be implemented without costly rewrite of operating system software. The feature is described in conjunction with a processor such as an IBM Series/1 processor, discussed in the manual entitled "IBM Series/1 System Summary," GA34-0035. The drawing shows the data flow and hardware necessary for implementation. The Reserve Storage Address Register and Reserve Storage Data Register can be designed to accommodate the addressing range and data width of the system. Any specific design depends on the cost trade-offs of hardware (low) to reduced service costs. Logic circuitry is utilized for online substitution of hard failures in main storage.