Browse Prior Art Database

GaAs LDD E-MESFET FOR ULTRA-HIGH SPEED LOGIC

IP.com Disclosure Number: IPCOM000047051D
Original Publication Date: 1983-Sep-01
Included in the Prior Art Database: 2005-Feb-07

Publishing Venue

IBM

Related People

Authors:
Codella, CF Ogura, S [+details]

Abstract

The LDD (lightly doped drain-source) E-MESFET is an improved MESFET design utilizing a self-aligned gate and LDD structure. The improved device cross section is shown in Fig. 1B along with that of a previously published [*] enhancement-mode MESFET 1A. Since the gate is self-aligned, the length of the lightly doped channel is minimized and, thus, so is the series resistance. The shallow source/ drain extensions can be positioned near the gate edge without affecting the enhancement-mode operation significantly due to the light doping. The n+ doped source/drain regions are positioned further away where they will not affect device threshhold voltage and can be doped heavily to insure good ohmic contacts.