Accurate High-Speed Integrator
Original Publication Date: 1983-Sep-01
Included in the Prior Art Database: 2005-Feb-07
The integrator disclosed herein eliminates integrator output errors resulting from unequal turn-on and turn-off delays in the analog switch which connects the integrator input signal to the integrator. The integrator output errors are eliminated by adding a delay module and a logic gate between the control pulse input and the analog switch. Fig. 1 illustrates an integrator which exhibits output errors. The integrator includes a well-known operational amplifier integrator having the requisite resistance and capacitance attached thereto. An analog switch controls the integration time of an input signal by means of a control pulse. Output errors occur because the analog switch does not open and close instantaneously but rather exhibits a finite delay.