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Compatible Circuits Implemented in DDL and TTL Technology Disclosure Number: IPCOM000047200D
Original Publication Date: 1983-Oct-01
Included in the Prior Art Database: 2005-Feb-07

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Gani, VL Reith, TM Sullivan, MJ [+details]


This is a technique for providing compatible logic levels for diode-diode logic (DDL) and transistor-transistor logic (TTL). Fig. 1 illustrates a TTL circuit in which transistor TIN is flexible to receive both internal and external logic voltage swings. Internal signals are in the order of zero to -1.2 volts. External signals in the order of -0.8 to -2.0 volts can be received by means of shorting the isolated bases to the common collector, as shown by dotted lines. The same circuit function performed by the TTL circuit in Fig. 1 is performed by the DDL circuit in Fig. 2. By replacing transistor TIN with low barrier Schottky barrier diodes (SBDs), the Fig. 2 circuit provides a TTL compatible logic circuit with better speed.