The InnovationQ application will be updated on Sunday, May 31st from 10am-noon ET. You may experience brief service interruptions during that time.
Browse Prior Art Database

Wild-Branch Avoidance During Microcode Execution

IP.com Disclosure Number: IPCOM000047264D
Original Publication Date: 1983-Oct-01
Included in the Prior Art Database: 2005-Feb-07

Publishing Venue


Related People

Shih, A [+details]


This invention relates to memory protection by preventing the instruction counter of a microprocessor from assuming unintended values and thereby inhibiting unintended instruction fetches from memory. In this regard, a tag and signature to each instruction is assigned, and execution is inhibited if there is a mismatch between the pre- and post-initial microcode load (IML) values. This occurs when a program instruction are fetched from program store RAM random-access memory) to the microprocessor. It is appreciated that it is difficult to detect a wild or illegal branch within a program store boundary in a microprocessor. The invention contemplates assigning a tag and signature to every instruction. During IML, the tag and signature are loaded into the RAM.