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Error Correction Procedure to Correct One Hard and One Soft Error Using a Single Error Correcting Code

IP.com Disclosure Number: IPCOM000047387D
Original Publication Date: 1983-Nov-01
Included in the Prior Art Database: 2005-Feb-07

Publishing Venue

IBM

Related People

Authors:
Kerrigan, M Shen, WW Taylor, JM [+details]

Abstract

A storage array stores data words including a data field and a check field related by a double error detecting/single error correcting code in which an even number of bits of the data field contribute to each parity bit of the check field, an exemplary code being illustrated in the above drawing. An error detection/correction mechanism lies in the output from the array, passing good data words, correcting and passing data words detected to include a single error and holding data words detected to include plural errors, signalling the same to be uncorrectable. In response to signalling of an uncorrectable error, the data field only is bit-inverted, rewritten and reread. If all errors have disappeared, or if a single error is detected and has been corrected, the reread data field is again inverted and passed as good data.