Original Publication Date: 1983-Dec-01
Included in the Prior Art Database: 2005-Feb-08
This mechanism is used for a processor that has a checkpoint retry which encompasses multiple instructions. Conditionally, either manually or after the detection of an error, the time duration between checkpoints may be shortened by forcing the checkpoint to occur. The manual method may be used to troubleshoot a problem. The automated method, after error detection occurs, shortens the time duration between checkpoints so that a subsequent error will occur as close to a checkpoint as possible. This improves control over the status of the system when errors occur by keeping the previous checkpoint as close as possible to the point of error. This facilitates error data recording and analysis. After a limited time period (e.g., 10 ms) if no error has occurred, then the normal rate of checkpointing will be reestablished.