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Josephson Pulse-Echo Delay Circuit

IP.com Disclosure Number: IPCOM000047744D
Original Publication Date: 1983-Dec-01
Included in the Prior Art Database: 2005-Feb-08

Publishing Venue

IBM

Related People

Authors:
Jackel, H [+details]

Abstract

A pulse-echo-type delay circuit is proposed in which a short pulse, provided by a pulse generator, is fed to a superconducting transmission line the far end of which is not terminated with its characteristic impedance, i.e., it is either open-ended or shorted. The polarity of the reflected pulse is reversed and can thus be discriminated from the outgoing pulse. Fig. 1 shows an embodiment of the delay circuit in which the far end of the transmission line is open-ended. The pulse generator, controlled by current signals Ic , provides the outgoing current pulse iout via matching resistor R to terminal A of the transmission line TL. Their characteristic impedance Z corresponds to that of resistor R. Due to the reflection of the pulse at the far end B of the transmission line, the polarity of the current pulse changes its sign.