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Programmable Data BYTE SUPPRESSOR

IP.com Disclosure Number: IPCOM000048008D
Original Publication Date: 1983-Dec-01
Included in the Prior Art Database: 2005-Feb-08

Publishing Venue

IBM

Related People

Authors:
Overby, WA [+details]

Abstract

A data byte suppressor is described for suppressing a single byte of data in a block of data being stored onto a medium for the purpose of checking the error detection and correction circuits. The circuit to be described passes a selected number of bytes which are written onto the storage medium. When the selected number of bytes have been passed, a single byte is suppressed. The remaining bytes are then passed. Binary data storage devices are often provided with error detection and correction capabilities, such as cyclic redundancy checks or Hamming code parity checks. It is desirable to have a way to suppress data in a predictable way so as to simulate the loss of data to test the error detection and correction circuitry. Fig. 1 shows a general block diagram for interfacing the data source to the recording medium.