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Fabrication Procedures for a Self Aligned Depletion Implant Under the Storage Plate of a Double Polysilicon One Device FET Dynamic RAM

IP.com Disclosure Number: IPCOM000048082D
Original Publication Date: 1981-Dec-01
Included in the Prior Art Database: 2005-Feb-08

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Chao, HH [+details]


Three fabrication procedures for making a self aligned depletion implant under a storage plate of a double polysilicon one device FET (field effect transistor) dynamic RAM (random access memory) are described.