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Implementation of Main Frame System Using Several Microcoded Microprocessors and a Coded Microprocessor

IP.com Disclosure Number: IPCOM000048140D
Original Publication Date: 1981-Dec-01
Included in the Prior Art Database: 2005-Feb-08

Publishing Venue

IBM

Related People

Authors:
Agnew, PW Buonomo, JP Houghtalen, SR Kellerman, AS Losinger, RE Valashinas, JW [+details]

Abstract

It would be highly desirable to implement the architecture of a main frame system using microprocessors. Such an implementation should be adapted so that: a) partitioning of performance critical instructions leaves microcode, data flow and registers used by each such instruction all on the same chip; b) the multiprocessor intercommunication mechanism employed does not require special facilities on any of the microprocessors; and c) code implementing the most error-prone instructions and functions can be easily written, extended and changed.