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Implementation of IBM System/370 Using Two Microcoded Microprocessors Executing Overlapping Subsets of the Architecture

IP.com Disclosure Number: IPCOM000048141D
Original Publication Date: 1981-Dec-01
Included in the Prior Art Database: 2005-Feb-08

Publishing Venue

IBM

Related People

Authors:
Agnew, PW Buonomo, JP Houghtalen, SR Kellerman, AS Losinger, RE Valashinas, JW [+details]

Abstract

A microprocessor based implementation of a main frame architecture, which would be usable before available integrated circuit chip density allows a one chip implementation, having small cost/performance degradation in comparison to a one chip implementation, is described. This implementation would be a natural precursor to a one chip implementation. State of the art microprocessors achieve excellent cost/performance by combining on a single chip, the necessary data flow, register array, and controls. Thus, the critical path through these functional elements is very short, both physically and electrically. However, the capacity of the control store is limited by the space available on the microprocessor chip.