Browse Prior Art Database

Use of Manufacturing Constraints to Minimize Hardware

IP.com Disclosure Number: IPCOM000048198D
Original Publication Date: 1981-Dec-01
Included in the Prior Art Database: 2005-Feb-08

Publishing Venue

IBM

Related People

Authors:
Calvignac, J Masclet, A [+details]

Abstract

Design in large scale integration must cope with the constraints of manufacturing. In order to enable sequential logic testing, all latches are implemented by using the LSSD (Level Sensitive Scan Device) technique. This proposal makes use of the testing latches as a piece of hardware to embody given functions.