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Double Clocked Late Multiplexed Data Path Select Circuit Disclosure Number: IPCOM000048330D
Original Publication Date: 1982-Jan-01
Included in the Prior Art Database: 2005-Feb-08

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Scaccia, RJ [+details]


In many cases when strobed and gated controlled multiplexed data arrive later than its strobe (synchronized clock), it may be impossible either to shorten the data path or to catch the strobe via some decode and hold it until after the initial edges of data (all bits) have arrived.