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Edge-Triggered Flip-Flops with Edge-Triggered Clear and Preset

IP.com Disclosure Number: IPCOM000048489D
Original Publication Date: 1982-Feb-01
Included in the Prior Art Database: 2005-Feb-08

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Hernandez, I [+details]


Fig. 1 shows a standard D-type edge-triggered flip-flop with the standard type of preset and clear. The preset and clear inputs are level sensitive. The design shown in Fig. 2 modifies the standard design by adding the circuitry in the dotted squares. This circuitry transforms the level sensitive clear and preset inputs to edge-sensitive inputs. The block diagram of the circuit shown in Fig. 2 is shown in Fig. 3.