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Interface Definition For Direct Memory Access Support

IP.com Disclosure Number: IPCOM000048518D
Original Publication Date: 1982-Feb-01
Included in the Prior Art Database: 2005-Feb-08

Publishing Venue

IBM

Related People

Authors:
Magrisso, IB [+details]

Abstract

The interface control sequences required by a Direct Memory Access (DMA Controller and associated input/output (I/O) devices and storage are described. This interface minimizes the number of steps in the data transfer sequence and the pins required by the DMA Controller. the Controller is the master during the data transfer operation. This approach requires that the DMA Controller act as an intermediary, and therefore adds a performance burden as well as I/O pins to the DMA Controller. On a Storage Read operation, the Controller must do a Read operation to Storage and a Write operation to a Device. On a Storage Write operation, the Controller first does a Read from the Device and then a Write to Storage. The amount of performance penalty depends on how well synchronized all the components are.