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Abrupt high-low source and drain junctions obtained using a doped polycrystalline silicon method enhance the data retention time of the one-device dynamic memory cell shown in Fig. 3.
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Method To Make A One-Device Dynamic Memory Cell
Abrupt high-low source and drain junctions obtained using a doped
polycrystalline silicon method enhance the data retention time of the one-device
dynamic memory cell shown in Fig. 3.
Referring to Fig. 1, blanket N+ subcollector 1 is formed in p-substrate 2, and
N- epitaxial layer 3 is grown. The epi layer 3 is oxidized, and resist (not shown)
is applied to define the isolation zone 4. The zone 4 is formed in the usual
manner by etching a trench and then filling the trench with silicon dioxide.
A 3000 Angstroms, N+ doped polycrystalline silicon layer 5 and a 2000
Angstroms silicon dioxide layer 6 are deposited on epi layer 3. Opening 7 is
formed photolithographically,through layers 5 and 6 for the injector region.
Approximately 3000 A of additional silicon dioxide is deposited, and the resulting
structure is reactively ion etched to remove the additional dioxide from all
horizontal surfaces, leaving a lining 8 of the additional dioxide about the vertical
wall of opening 7.
N+ region 9 is ion-implanted through opening 7 and is driven in. P+ injector
region 10 (Fig. 2) is implanted and driven in to a lower depth than N+ region 9.
P+ polycrystalline silicon layer 11 and silicon dioxide layer 12 of 4000 A and 2000
A thickness, respectively, are deposited and selectively etched to yield the
structure shown in fig. 2. Finally, source 13, drain 14, and injector 10 contacts
are added to complete the device, as shown in Fig....