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Surface Charge Reduction of Integrated Circuits Under E-Beam Test Conditions Disclosure Number: IPCOM000048980D
Original Publication Date: 1982-Apr-01
Included in the Prior Art Database: 2005-Feb-09

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Related People

Morrissey, JM Wolcott, JS [+details]


Integrated circuits may be tested using an electron beam in a SEM (Scanning Electron Microscope). DC and/or time varying signals are applied to the circuit while observing it in the SEM. Signals may be measured or traced throughout the chip on exposed metal, polysilicon lands and buried metal, polysilicon lands or diffusions.