Surface Charge Reduction of Integrated Circuits Under E-Beam Test Conditions
Original Publication Date: 1982-Apr-01
Included in the Prior Art Database: 2005-Feb-09
Integrated circuits may be tested using an electron beam in a SEM (Scanning Electron Microscope). DC and/or time varying signals are applied to the circuit while observing it in the SEM. Signals may be measured or traced throughout the chip on exposed metal, polysilicon lands and buried metal, polysilicon lands or diffusions.