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Improves Decoding Timing for One Device FET Random Access Memory Arrays Disclosure Number: IPCOM000049357D
Original Publication Date: 1982-Apr-01
Included in the Prior Art Database: 2005-Feb-09

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Lo, TC Scjeuerlein, RE Tamlyn, R [+details]


This is a technique for delaying column decoding in field-effect transistor (FET) random-access memory (RAM) arrays until critical sensing has been completed. In this way, substrate noise generated by column decoding is prevented from disturbing the sensing operation.