Browse Prior Art Database

Parallel Multiplier

IP.com Disclosure Number: IPCOM000049371D
Original Publication Date: 1982-Apr-01
Included in the Prior Art Database: 2005-Feb-09

Publishing Venue

IBM

Related People

Authors:
Beraud, JP Galand, C [+details]

Abstract

This article describes a method of multiplying two 12-bit numbers, which combines the booth algorithm with 6-bit adders, with actual gain in computational speed and multiplier design complexity.