On-Chip High Speed Communications
Original Publication Date: 1982-Apr-01
Included in the Prior Art Database: 2005-Feb-09
In integrated circuit design, a major problem is achieving high speed between nodes, between modules on a chip, or between chip interfaces. High capacitance loads exist at these points, and as the driver circuits are boosted in power, the nodal capacitance increases also until a point is reached where increased drive capability is totally absorbed by increased capacitance so that no further speed improvement is possible.