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Multi-Chip Power Hybrid Module

IP.com Disclosure Number: IPCOM000049428D
Original Publication Date: 1982-Apr-01
Included in the Prior Art Database: 2005-Feb-09

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Wright, WL [+details]


This design concept provides reduced thermal resistance paths between power dissipating elements of a VLSI (very large-scale integration) function and a heat sink, with a substrate wireability and module I/O capability to support the circuit requirements of that function. By using a combination of packaging features, this design also achieves high utilization of substrate surface area for component mounting, and a versatile I/O termination technique that does not significantly impact substrate design. Assembly costs of this module design are minimized through the use of premolded components and low-cost joining processes.