Vector-Register Rename Mechanism
Original Publication Date: 1982-Jun-01
Included in the Prior Art Database: 2005-Feb-09
This article describes a method of allowing concurrent execution of vector instructions which operate on arithmetic data. Basically, the mechanism is as follows: While a vector instruction is executing, the results are put away into a transparent, or dummy, register. When the instruction finishes execution, then that register is renamed as the sink register that was specified by the instruction.