The InnovationQ application will be updated on Sunday, May 31st from 10am-noon ET. You may experience brief service interruptions during that time.
Browse Prior Art Database

Process for FET with Short Channel Defined by Shallow Extensions of Drain and Source Diffusions

IP.com Disclosure Number: IPCOM000049594D
Original Publication Date: 1982-Jun-01
Included in the Prior Art Database: 2005-Feb-09

Publishing Venue


Related People

Tsang, YL [+details]


An FET (field-effect transistor) has relatively deep N/+/ diffusions where the metal contacts for the drain and source terminals are located, and it has thin extensions of these diffusions up to the edges of the channel. The thin diffusion and a sealed gate structure permit the edge of the channel to be formed more accurately and reliably.