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Browse Prior Art Database

Hardware Realization of Software

IP.com Disclosure Number: IPCOM000050041D
Original Publication Date: 1982-Aug-01
Included in the Prior Art Database: 2005-Feb-09

Publishing Venue

IBM

Related People

Authors:
Roth, JP [+details]

Abstract

Computers are composed of algorithms realized in hardware and algorithms realized in software. Because the cost of VLSI (very large-scale integration) hardware is precipitously decreasing, and because of speed considerations, the hardware-realization may be VASTLY faster than the software, a hardware realization might, in some instances, be attractive. A general form of REGULAR program and an algorithm compiler for transforming it into a very general form of REGULAR hardware are described herein. It is assumed that all arguments and values of functions are vectors with binary components. This compiler is a generalization of RTRAN (1) which transforms a high-level hardware specification into hardware. A rendition of this compiler was given in (2). A PRIMITIVE R-ALGORITHM is of the following form v=F(u)=:v1=F1(u1);...