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Semiconductor chip bus lines, which account for a considerable capacitive load, are driven by the described tristate driver without incurring switching speed reductions.
English (United States)
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On-Chip Tristate Driver
Semiconductor chip bus lines, which account for a considerable capacitive
load, are driven by the described tristate driver without incurring switching speed
Fig. 1 shows a first example of the tristate driver which essentially consists of
two NAND gates 1 and 2, whose data inputs D1 and D2 are interconnected.
Control signal HZ, switching the driver to its high impedance state, is applied to
the third input C of NAND gate 2. The cathode of Schottky diode SD1, whose
anode is linked with supply voltage V(CC) applied to the chip by resistor R1, is
also connected to input C. The connecting point of Schottky diode SD1 and
resistor R1 is linked with output 01 of NAND gate 1 and the base of an additional
transistor T8 which, similar to the NAND gate transistors, is provided with an
antisaturation diode. The collector of transistor T8 is connected to supply voltage
V(P) which is generated from the higher chip supply voltage V(CC) and
simultaneously serves as the supply voltage for NAND gates 1 and 2. The
emitter of transistor T8 is connected to output 02 of NAND gate 2 which is also
the output of the tristate driver. Transistor T8 is series-connected to output
transistor T7, forming the collector resistor of this transistor.
Application of a high potential to control input C of NAND gate 2 prevents the
high impedance state in which driver output transistors T7 and T8 are non-
conductive. In this case, the state of the driver is determi...