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Storage Protection Mechanism for Microprocessors

IP.com Disclosure Number: IPCOM000050395D
Original Publication Date: 1982-Oct-01
Included in the Prior Art Database: 2005-Feb-10

Publishing Venue

IBM

Related People

Authors:
Brackenbury, IF [+details]

Abstract

This article concerns a simple protection mechanism for isolating subspaces within a real address space so that each subspace has unrestricted access to all locations within it- including any contained subsubspace- but cannot access (reference or modify) locations outside the subspace. In particular, the mechanism caters for one global address space and two subspaces A and B. Each of these subspaces contains a subsubspace A(a) and B(b), respectively. Such an arrangement can provide for the isolation of manufacturer developed code (subspace A, say) from customer written code (subspace B, say), with the subsubspaces providing "privileged" and "problem-program" storage areas.