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Josephson Circuit Fabrication Process

IP.com Disclosure Number: IPCOM000050407D
Original Publication Date: 1982-Oct-01
Included in the Prior Art Database: 2005-Feb-10

Publishing Venue

IBM

Related People

Authors:
Faris, SM [+details]

Abstract

Preparing and testing a full-wafer Josephson junction, and subsequently subtractively etching a pattern to define individual junctions and conductors, increases yield and permits the manufacture of complex integrated devices in Josephson technology. The most crucial fabrication step in Josephson technology is the formation of the tunnel barrier and the reproducible control of the current density and its variations. In present practice, the tunnel barrier fabrication step is preceded by several steps involving photo-resist layers and SiO which are detrimental to reproducibility, reliability, and the ability to cycle the junctions between room temperatures and cryogenic temperatures.