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Browse Prior Art Database

Logical Enhancements to FET and Array Structures

IP.com Disclosure Number: IPCOM000050600D
Original Publication Date: 1982-Nov-01
Included in the Prior Art Database: 2005-Feb-10

Publishing Venue

IBM

Related People

Authors:
Cases, M Kraft, WR Moore, VS Stahl, WC Thoma, NG [+details]

Abstract

A means is provided for increasing logical capabilities of AND array product terms with optimum layout density and wirability. Furthermore, the AND array logical structure can be dynamically changed.