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Browse Prior Art Database

Microprocessor Interleave Instruction

IP.com Disclosure Number: IPCOM000050608D
Original Publication Date: 1982-Nov-01
Included in the Prior Art Database: 2005-Feb-10

Publishing Venue

IBM

Related People

Authors:
Leininger, JC [+details]

Abstract

A microprocessor designed to access several different types of semi-conductor memories with different speed characteristics may be configured so that the semiconductor memories used in a particular application are interleaved. This interleaving serves to reduce the effective access time of the memory. Magnetic core technology provided core memories that were designed with an "Advance" signal that indicated that data was being accessed and would be available a fixed time after advance. This allowed core memories to be interleaved, and when successive accesses were from the same memory, the processor would then halt until the "Advance" signal was received. Semiconductor memories do not have "Advance" signals, and require unique hardware controls to provide flexibility in the interleaving of memories.