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P Buffer Gallium Arsenide Process for Digital Logic

IP.com Disclosure Number: IPCOM000050684D
Original Publication Date: 1982-Dec-01
Included in the Prior Art Database: 2005-Feb-10

Publishing Venue

IBM

Related People

Authors:
Andrade, TL [+details]

Abstract

Most gallium arsenide digital logic devices are fabricated on semi-insulating gallium arsenide which is neither N-type nor P-type but has a deep acceptor dopant Which compensates for the residual donors in the bulk material. This semi-insulating property simplifies device isolation and since the substrate is neither P-type nor N-type, junction capacitance is at a minimum. Unfortunately, because the dopants, like silicon in the gallium arsenide, have a high dielectric constant, electrical cross coupling can be a problem.