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Methods for Fabricating P/+/ and N/+/ Poly SI Gates in a Single Poly SI Layer for Mosfet Applications

IP.com Disclosure Number: IPCOM000050755D
Original Publication Date: 1982-Dec-01
Included in the Prior Art Database: 2005-Feb-10

Publishing Venue

IBM

Related People

Authors:
Bassous, E Hu, GJ Osburn, CM [+details]

Abstract

Dual-polarity polycrystalline silicon (poly-Si) gates which are useful in CMOS integrated circuits can be readily fabricated by novel simplified processes described in this publication.