Mechanism to Detect Bursts/Gaps of Cache Miss Activity
Original Publication Date: 1982-Dec-01
Included in the Prior Art Database: 2005-Feb-10
Several techniques for improving the performance of a machine by tailoring its cache mechanism to local deviations from the average buffer miss rate is described. For example, the number of bytes transferred per miss (linesize) can be shortened while the buffer miss rate is high and lengthened while the buffer miss rate is low. This permits the fastest possible adaptation of the cache to gross locality changes (high buffer miss rate) by eliminating trailing edge delays due to transfer mechanism busy and processor/transfer-mechanism interlocks, while maintaining large transfers during periods of low contention. All such schemes depend, however, on the ability to predict local variations in the buffer miss rate.