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Browse Prior Art Database

Floating Point Operand Normalization

IP.com Disclosure Number: IPCOM000050980D
Original Publication Date: 1982-Dec-01
Included in the Prior Art Database: 2005-Feb-10

Publishing Venue

IBM

Related People

Authors:
Finney, DW Suarez, GA [+details]

Abstract

A microprogram-controlled circuit is described which will normalize floating point operands efficiently, using as few microwords and execution cycles as possible. Floating point operands must be stored in normalized format. This requires that the high-order hexadecimal digit of the fraction be nonzero. However, after most floating point operations, it is possible to have one or more high-order zeros in the fraction. The fraction must be shifted left until there is no hexadecimal zero in the high-order position and a characteristic minus one operation must be performed for each digit shifted out. The hardware shown in the figure assists the microprogram in shifting out the zero digits and updating the characteristic.