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A processor has holdover capabilities to store an address after a source has been gated off.
English (United States)
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Overlapped Storage Cycle
A processor has holdover capabilities to store an address after a source has
been gated off.
As shown in Fig. 1, a storage address register holdover (SAR HO) register is
provided in addition to the storage address register (SAR).
As shown in Fig. 2, the SAR and SAR HO are clocked at the same time in the
load cycle using path 1 in Fig. 1. In the next cycle, the new storage address is
loaded into the SAR, but the old data is still valid in the Storage Data Register
(SDR). In the next cycle, the SAR HO is loaded from the SAR using path 2 in
The ability to load the SAR early and use the SDR late is helpful to the
microprogrammer in saving time and read-only storage words.
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