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This article describes a method for optimally verifying main storage by finding all uncorrectable (double-bit) errors (UEs) in all possible combinations of data and error correction code (ECC) bits.
English (United States)
This text was extracted from a PDF file.
This is the abbreviated version, containing approximately
73% of the total text.
Page 1 of 1
Storage Verification Method
This article describes a method for optimally verifying main storage by
finding all uncorrectable (double-bit) errors (UEs) in all possible combinations of
data and error correction code (ECC) bits.
The verification is done by programs executing on a processor having access
to the storage being verified. The problem is to find UEs, including UEs that may
result from errors in the ECC bits themselves, using a minimal set of bit patterns
to test for all combinations of double-bit errors. First, the storage is tested with a
pattern of all 0Os. A map is then made of all the single-bit ("stuck at 1") faults in
storage. Then, another pass is made using a pattern of all 1's. This will catch all
single-bit - "stuck at 0" -faults. The addresses of the "stuck at 0" faults are
matched against the addresses of the "stuck at 1" faults to provide a complete
double-bit error map. This method does not work in practice though, because of
the number of expected single-bit errors. The time required to map all single-bit
errors in a large storage makes this method unfeasible.
This article describes a minimal set of patterns for groups of 64 data bits (14
patterns) and then describes two additional patterns needed to completely cover
the related eight ECC bits as well. These 16 patterns provide total coverage of
all double-bit errors which may occur in any 72-bit group tested by the 16
The patterns, represented in hexadecimal, are as follows: