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In the fabrication of very dense integrated circuits requiring a large number of contacts, high contact resistance due to residual oxide is a yield detractor.
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Palladium Silicide Contact Resistance and Yield Improvement
In the fabrication of very dense integrated circuits requiring a large number
of contacts, high contact resistance due to residual oxide is a yield detractor.
One process for forming paladium silicide (Pd(2)Si) contacts comprises a
pre-metallization etch of the substrate followed by a blanket deposition of Pd
which is sintered at 400 degrees C in a forming gas ambient. The excess Pd is
then etched away.
The modification proposed here comprises a variation in the sintering step by
performing it at 700 degrees C in the forming gas ambient.
This modification has certain advantages. It is believed that Pd behaves as a
catalyst in the presence of H(2) (supplied by the forming gas) at favorable rates
above 600 degrees C to reduce any traces of SiO(2). Wit many contacts,
statistics show that some of them are poorly opened in processing, i.e., SiO(2)
left in the contact openings. An additional advantage is that a reduction in
contact resistance can be realized if the anneal or sintering temperature is raised
above 700 degrees C, since Pd(2)Si is formed with lower resistivity at that
temperature than Pd(2)Si formed at the 400 degrees C anneal temperature.