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Browse Prior Art Database

High Speed Decoder Circuit with Low Power Requirements for Clock Controlled Semiconductor Storages

IP.com Disclosure Number: IPCOM000051398D
Original Publication Date: 1981-Jan-01
Included in the Prior Art Database: 2005-Feb-10

Publishing Venue

IBM

Related People

Authors:
Klein, W Klink, E Najmann, K Wernicke, FC [+details]

Abstract

For keeping the area of semiconductor chips as small as possible, two-level decoding, instead of the usual one-level decoding, is used. Such two-level decoding is described in [*].