The InnovationQ application will be updated on Sunday, May 31st from 10am-noon ET. You may experience brief service interruptions during that time.
Browse Prior Art Database

High Speed Decoder Circuit with Low Power Requirements for Clock Controlled Semiconductor Storages

IP.com Disclosure Number: IPCOM000051398D
Original Publication Date: 1981-Jan-01
Included in the Prior Art Database: 2005-Feb-10

Publishing Venue


Related People

Klein, W Klink, E Najmann, K Wernicke, FC [+details]


For keeping the area of semiconductor chips as small as possible, two-level decoding, instead of the usual one-level decoding, is used. Such two-level decoding is described in [*].