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Circuit Arrangement for Serially Processing Arbitrarily Asynchronously Occurring Request Signals

IP.com Disclosure Number: IPCOM000051400D
Original Publication Date: 1981-Jan-01
Included in the Prior Art Database: 2005-Feb-10

Publishing Venue

IBM

Related People

Authors:
Staiger, D [+details]

Abstract

The synchronization circuit shown in the figure permits arbitrarily asynchronously occurring request signals to be processed without restrictions. The frequency of the signals to be synchronized and the time required for executing the various steps involved may be arbitrarily varied. The illustrated synchronization circuit also permits the time intervals required for the asynchronous operation to be adhered to as strictly as possible. It is essential that control signals for operating modes, for allocating priorities, and the like, are not required.