Testing Tristate Off Chip Drivers in FET Designs
Original Publication Date: 1981-Jan-01
Included in the Prior Art Database: 2005-Feb-10
A technique is disclosed for testing a tristate off-chip driver (OCD) circuit such as is shown in Fig. 1. The testing technique employs an off-chip test load connected between the tester and the output terminal of the circuit, shown in Fig. 2. The test load is a resistor R(L) and diode V(D) connected between a tester-supplied voltage V(L) and the output node of the OCD circuit.