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Browse Prior Art Database

Quasi Synchronization of a Slow Speed Channel to a Direct Access Storage Device

IP.com Disclosure Number: IPCOM000051461D
Original Publication Date: 1981-Jan-01
Included in the Prior Art Database: 2005-Feb-10

Publishing Venue

IBM

Related People

Authors:
Cheng, YP Luiz, FA Shomler, RW Thompson, WG [+details]

Abstract

Direct-access storage devices which employ an architecture for the reading and writing of data which requires that the host (attaching channel, main storage, etc.) be in precise synchronism with the rotating storage medium, also requires that data be transferred exactly at the rate of data reading or writing at the device. The data requests are made to the channel by the storage control providing the attachment of the device to the channel. These requests are made at the transfer rate of the device. The channel satisfies these requests on a demand-response basis at a rate necessary to keep up with the device transfer on the recording track.