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Redundant Circuit Personalization at the Module Level

IP.com Disclosure Number: IPCOM000051586D
Original Publication Date: 1981-Feb-01
Included in the Prior Art Database: 2005-Feb-10

Publishing Venue

IBM

Related People

Authors:
Coullahan, JP Klara, WS Kwap, TW [+details]

Abstract

A technique is described that enables the use of redundancy in memory chips but requires only a single part number. By removing solder balls when no connection is desired between the chip and the module substrate, redundancy can be used to increase yields with no increase in the number of part numbers. Consider the chip wiring and pad array shown in Fig. 1. The diagram is illustrated for a three-bit memory chip with one bit of redundancy. The technique may readily be extended to a chip having a larger number of bits. The chip is depicted with pads down.