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Cryogenic Testing of Josephson Chips

IP.com Disclosure Number: IPCOM000051698D
Original Publication Date: 1981-Feb-01
Included in the Prior Art Database: 2005-Feb-10

Publishing Venue

IBM

Related People

Authors:
Byrnes, H Moskowitz, PA Wahl, R [+details]

Abstract

In the testing of Josephson device chips, it is necessary to provide a contactor package which will work well at 4.2 degrees K. Such a package has to have minimal length contact paths and in conjunction avoid the problem of differential contraction between different materials. If undue contraction occurs, it will not be possible to align contacts to pads on the chip under test. It is also desirable to minimize stray magnetic fields at the chip since Josephson circuits depend upon magnetic fields for their switching properties. The package shown in Figs. 1 and 2 uses miniature contacts, a silicon space transformer, and a molybdenum alignment frame to solve these problems.