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Differences in contamination levels between susceptors used for epitaxial silicon deposition made of polysilicon or silicon carbide coated graphite can be measured by a MOS charge retention technique.
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Evaluation of Polysilicon Hardware by the Use of MOS Charge Retention
Differences in contamination levels between susceptors used for epitaxial
silicon deposition made of polysilicon or silicon carbide coated graphite can be
measured by a MOS charge retention technique.
The speed at which the capacitance rises to its inversion value after being
pulsed from accumulation into deep depletion is a measure of the minority carrier
generation rate in silicon and is related to the defect level in the substrates.
Poor retention time yield has been linked with contamination levels known to
be deleterious to semiconductor devices. This technique has been found to be
more sensitive than SIMS (Secondary Ion Mask Spectroscopy) or Auger
spectroscopy which are unable to detect low levels of less than 0.4 part per
billion of heavy metals, such as iron and copper. These, as well as other
impurities, can possibly come from the machining of polysilicon parts.