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In the functional diagram for the programmable display generator shown above, two digital CRT displays, which present different pictures, must have their fields periodically refreshed from a refresh buffer.
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Triple A/B Buffer for Dual Digital TV Displays
In the functional diagram for the programmable display generator shown
above, two digital CRT displays, which present different pictures, must have their
fields periodically refreshed from a refresh buffer.
Conventional digital TV displays typically employ an A-B swing buffer
arrangement for refreshing a single digital CRT. While a first buffer, the A buffer,
is being loaded with data from a memory update controller, the second buffer, the
B buffer, supplies data stored in it to the digital CRT display for refresh
operations. If two or more digital CRT displays are required, two buffers, the A
and the B portions would be required for each display.
The triple A-B buffer arrangement shown in the figure has first memory 1,
second memory 2 and third memory 3, each containing a different data set,
connected between the memory update controller 5 and the two digital CRT
displays 6 and 7. The buffers 1, 2 and 3 are commonly connected to 5, 6 and 7
by means of the tristate time-shared bus 10.
In operation, data previously stored in buffer 1 can be used to refresh a first
digital CRT display 6, and data previously stored buffer 2 can be used to refresh
the second digital CRT display 7, while the memory update controller 5 is loading
the buffer 3 with new refresh information for the first CRT display 6. After buffer
3 has been fully loaded from the memory update controller 5, buffer 1 is
disconnected over the bus 10 from the f...