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First In/First Out Buffer State Transition Mechanism

IP.com Disclosure Number: IPCOM000051841D
Original Publication Date: 1981-Mar-01
Included in the Prior Art Database: 2005-Feb-11

Publishing Venue

IBM

Related People

Authors:
Bergey, AL Cheng, YP Thompson, WG [+details]

Abstract

In a system employing a first-in/first-out (FIFO) buffer in a microcode control unit between a CPU/Channel and a direct-access storage device (DASD), an automatic data transfer feature controls the data flow between these elements. The ADT provides three buffer communication paths: automatic transfer between the device and the buffer, automatic transfer between the channel and the buffer, and manual microcode access to the buffer. The two automatic paths require microcode assistance during the initialization and completion of data transfers, but not during the transfer itself. The manual path to the buffer requires microcode assistance for every byte handled. The two automatic paths can be run either in sync with one another, or asynchronously.