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Risking and Falling Edge Expansible Digital Debounce Circuit

IP.com Disclosure Number: IPCOM000051904D
Original Publication Date: 1981-Mar-01
Included in the Prior Art Database: 2005-Feb-11

Publishing Venue

IBM

Related People

Authors:
Kroeger, WL [+details]

Abstract

This digital debounce circuit utilizing a series of D flip-flops and a pair of inverters is expansible to produce any required debounce time on both the rising and falling edge of a signal.