The following operators can be used to better focus your queries.
( ) , AND, OR, NOT, W/#
? single char wildcard, not at start
* multi char wildcard, not at start
(Cat? OR feline) AND NOT dog?
Cat? W/5 behavior
(Cat? OR feline) AND traits
Cat AND charact*
This guide provides a more detailed description of the syntax that is supported along with examples.
This search box also supports the look-up of an IP.com Digital Signature (also referred to as Fingerprint); enter the 72-, 48-, or 32-character code to retrieve details of the associated file or submission.
Concept Search - What can I type?
For a concept search, you can enter phrases, sentences, or full paragraphs in English. For example, copy and paste the abstract of a patent application or paragraphs from an article.
Concept search eliminates the need for complex Boolean syntax to inform retrieval. Our Semantic Gist engine uses advanced cognitive semantic analysis to extract the meaning of data. This reduces the chances of missing valuable information, that may result from traditional keyword searching.
This digital debounce circuit utilizing a series of D flip-flops and a pair of inverters is expansible to produce any required debounce time on both the rising and falling edge of a signal.
English (United States)
This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
100% of the total text.
Page 1 of 2
Risking and Falling Edge Expansible Digital Debounce Circuit
This digital debounce circuit utilizing a series of D flip-flops and a pair of
inverters is expansible to produce any required debounce time on both the rising
and falling edge of a signal.
Fig. 1 shows a logic diagram of the debounce circuit in its general form. The
circuit is expansible by providing more D flip-flops connected as shown. The
debounce time is determined by purely digital components according to the
following equation: Debounce time = (N-1) over F where N = number of D-off
stages, and F = frequency of the input clock.
Fig. 2 shows the timing waveform for a six-stage version of the generalized
circuit of Fig. 1. Note that the input falling edge is delayed from its last bounce
to the output, edge A, by the debounce time or five clock periods. The rising
edge of the input is not delayed, but is transferred immediately to the output,
edge B. This provides for a quick return of one of the two edges of the output
without sacrificing debounce on either edge. It will be noted that the rising edge
of the input has the same bounce protection as the falling edge.
Page 2 of 2
[This page contains 4 pictures or other non-text objects]