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In a read-only memory system, the column select circuit can be enabled at the same time as the word line to allow an earlier sense amplifier enable pulse, resulting in improved access and cycle times.
English (United States)
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Accessing Circuitry and Method for a Read Only System
In a read-only memory system, the column select circuit can be enabled at
the same time as the word line to allow an earlier sense amplifier enable pulse,
resulting in improved access and cycle times.
In [*] there is disclosed read-only memory systems which include column
decoding and sensing circuits which are disposed on one side of an array and
also which include column decoding and sensing circuits which are disposed on
both sides of a double dense array. In the preceding article there is disclosed a
read-only memory system somewhat similar to that disclosed in [*] but which
includes a dual-bit switching network for improving performance while simplifying
the support circuitry.
By using the circuit illustrated in Fig. 1 along with the pulse program indicated
in Fig. 2 the performance of read-only memory systems can be further improved.
The bootstrap driver and decoder 10 in Fig. 1 may be similar to the decoding
circuit 14 and the bootstrapped transistor TD6 and the inverter 12 may be similar
to the inverter including TD9 and TD8 in Fig. 1 of [*]. Pulses including storage
address register (SAR), delayed word and column (DWC) and restore (R), are
applied to the input of bootstrap driver and decoder 10, and a not column select
pulse CS is produced at its output and applied to inverter 12 and to a bit switch
14 which may be of the type described in the preceding article. The output from
bit switch 14 is applied through a bus bar S to a Schmidt trigger circuit which is
identified by the dashed lines 16 and includes transistors T1, T2, T3 and T4 wit...