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Substrate Bias Generator Circuit

IP.com Disclosure Number: IPCOM000051929D
Original Publication Date: 1981-Apr-01
Included in the Prior Art Database: 2005-Feb-11

Publishing Venue

IBM

Related People

Authors:
Hanafi, HI [+details]

Abstract

This substrate bias generator circuit for FET applications uses a doubl voltage-boosting charge pump circuit in which power consumption is minimized by using clock-driven load devices.