Original Publication Date: 1981-Apr-01
Included in the Prior Art Database: 2005-Feb-11
This article pertains to high speed data buffers used in automatic logi test systems and involves a hardware data compression technique whereby test data is compressed on a per pin basis by storing the test data together with the number of cycles the data is present before different data is required. This technique, when employed, results in the following benefits: - The virtual depth of the buffer would be extended by a significant multiplier over the actual hardware depth. - Fewer actual bits would be needed to store the same amount of data.